I have twenty years experience designing extremely complex, highly constrained,  analog and digital circuit boards on a variety of CAD systems including over ten years on Cadence Allegro and the Specctra autorouter.  I have gained experience in a vast array of technologies and standards while working in a service bureau environment.  I have proven my skills working on hundreds of very different designs for hundreds of very different companies and engineers. I have a reputation for speed and accuracy. My experience is too extensive to describe briefly here. I would be happy to discuss my qualifications in more detail over the phone or to schedule an appointment for an interview. I have been presented with an amazing variety of design challenges and I am certain that I can be an asset to any company seeking a designer with the highest level of skill and experience.

I am immediately available for temporary contract or direct permanent full time or part time work laying out any type of printed circuit/wiring board. I can also incorporate your engineering changes to existing designs, build library symbols, even provide training for new Allegro users. I can manage your board fabrication, assembly and testing. I will install, upgrade or configure your Allegro software and provide any needed “engineering services” related tasks on a simple hourly contract.

I can work anywhere in the silicon valley area of California or on a short term basis outside the area. I have a broadband connection and access to an Allegro license allowing me to provide design services to companies anywhere.

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SAMUEL L. BAILEY

Phone (408)313-0834     or 

Seeking employment as a senior printed circuit board designer

 

WORK EXPERIENCE:

·        9/02 to 10/04 - Hammerhead Systems, Mt View, California

SENIOR CAD ENGINEER.  Using Cadence Allegro, I designed very dense, very complex, very high speed, highly constrained cards to 35K pins and 44 lyrs as the sole layout designer for this telecom startup.  Blind vias, Via-in-pad, chip on board, midplanes, interposers, etc. Established processes, specs, libraries and managed outside resources, broad range of technologies and responsibilities. Worked on every design in this high end router.

 

·        11/01 to 5/02 – Design Solutions Inc, San Jose, California

SENIOR DESIGNER.  Designed very complex high speed network cards for  leading edge companies using Cadence Allegro in a high pressure service bureau environment. 20+ layers, 40,000+ pins, fine pitch BGA’s

 

·        3/00 to 10/01 – Dynarc, San Jose, California

SENIOR DESIGNER.  Designed complex circuit boards for high speed fiber-optic routers using Cadence Allegro and Specctra Auto-router as the sole designer for a fast growing optical networking startup. Many dense, high pin count designs with complex routing considerations. Managed numerous outside design resources.

 

·        8/97 to 3/00 – CAD Alliance, Morgan Hill, California

SENIOR DESIGNER.  Designed complex circuit boards of various types using primarily Cadence Allegro and Specctra Auto-routing software in a service bureau environment. Many dense high speed layouts for top networking companies. Some training and scheduling responsibilities. Wide range of technologies.

 

·        6/93 to 8/97 - Hytek Services, Santa Clara, California

SENIOR DESIGNER.  Designed a wide variety of multi-layer smd and thru-hole PWBs both on-site at Raychem in Menlo park using P-CAD and as an in-house designer in a fast paced service bureau environment in Santa Clara using Cadence Allegro. ECL, differential pairs, matched lengths, high power, controlled impedance. Boards to 26 layers and over 50,000 component pins. Experience in a wide range of technologies.

                      

·        8/91 to 1/93 - Cubic Defense Systems, San Diego, California

SENIOR DESIGNER.  Designed Mil-spec analog and digital PWBs to 16 layers, smd and thru-hole, and all documentation using P-CAD. High speed and high frequency RF designs.

 

·        8/90 to 8/91 - M.I.N.T., Tucson, Arizona

SENIOR DESIGNER.  Designed dense multi-layer SMD PWBs as a contract employee using HP-EGS CAD software on an HP 9000 series terminal, including high speed “VME” bus designs.

 

·        6/87 to 9/90 - United Technologies - Hamilton Test Systems, Tucson, Arizona

PWB DESIGNER.  Designed a variety of PWBs and associated documentation using RACAL REDAC DSM6 software for UTC companies such as Otis Elevator, Carrier and Hamilton Standard.

 

·        3/86 to 5/87 - Midian Electronics Inc.,  Tucson, Arizona

PWB DESIGNER.  Designed very dense smd PWBs for sub-miniature tone signaling devices, and all documentation using P-CAD software.  Trained others on P-CAD.

 

·         9/85 to 3/86 - Genesis II Electronics Inc., Scottsdale, Arizona

PWB DESIGNER.  Designed boards for this service bureau using a RACAL REDAC CADET CAD system.

 

EDUCATION:

·        9/85      Miller Institute, ITT:  Phoenix, Arizona

 Degree:     Associate in Specialized Technology, Drafting/CAD-Honors

 

SKILLS AND QUALIFICATIONS:

·     20 years experience in printed circuit design and schematic capture on various CAD systems.

·     Proficiency with Cadence Allegro on UNIX or Windows including package symbol and padstack creation.

·     Proficiency with Specctra/CCT autorouter and various gerber tools.

·     Thorough knowledge of high-speed SI considerations, diff pairs, matched lengths, critical clocks etc.

·     Experience in high current design, extremes in component and routing density, large production runs.

·     Thorough knowledge of DFM issues, impedance concerns and RF design techniques.

·     Experience with planning, scheduling, progress reports and management of outside design resources.

·     Thorough knowledge of Mil specs, IPC, UL and numerous other standards.

·     The ability to work under stressful conditions and still get along with anyone.  

 

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